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Good morning FARDS

will check your github as soon as I'm back... sorry for not reading all!

Here is the output from your latest kernel as asked from the "gpl" tread:
Its booting with FB 10.1 on my hannspad.

But no debuging ..... Did I dwl the wrong kernel ?
The name is "2.6.32.9-g4209dc4-dirty"

p.s. One more thing with your kernel the internal "sdcard" partition was not mounted !
something to do with the vold.fstab

output rough copy/paste

########################################

sh-4.1# insmod /system/lib/modules/tegra-config-peek.ko
sh-4.1# lsmod
tegra_config_peek 37358 0 - Live 0xbf000000
sh-4.1# cd /sys/kernel/debug/
sh-4.1#
sh-4.1# cat realtime_tegra_clock
realtime_tegra_clock: No such file or directory
sh-4.1#
sh-4.1# cat realtime_tegra_pinmux_drive
realtime_tegra_pinmux_drive: No such file or directory
sh-4.1#
sh-4.1# cat realtime_tegra_pinmux
realtime_tegra_pinmux: No such file or directory
sh-4.1# ls
sh-4.1# uname -a
Linux localhost 2.6.32.9-g4209dc4-dirty #2 SMP PREEMPT Tue Nov 22 23:55:35 GMT 2011 armv7l GNU/Linux
sh-4.1#
 

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1,014 Posts
Good morning FARDS

will check your github as soon as I'm back... sorry for not reading all!

Here is the output from your latest kernel as asked from the "gpl" tread:
Its booting with FB 10.1 on my hannspad.

But no debuging ..... Did I dwl the wrong kernel ?
The name is "2.6.32.9-g4209dc4-dirty"

output rough copy/paste

########################################

sh-4.1# insmod /system/lib/modules/tegra-config-peek.ko
sh-4.1# lsmod
tegra_config_peek 37358 0 - Live 0xbf000000
sh-4.1# cd /sys/kernel/debug/
sh-4.1#
sh-4.1# cat realtime_tegra_clock
realtime_tegra_clock: No such file or directory
sh-4.1#
sh-4.1# cat realtime_tegra_pinmux_drive
realtime_tegra_pinmux_drive: No such file or directory
sh-4.1#
sh-4.1# cat realtime_tegra_pinmux
realtime_tegra_pinmux: No such file or directory
sh-4.1# ls
sh-4.1# uname -a
Linux localhost 2.6.32.9-g4209dc4-dirty #2 SMP PREEMPT Tue Nov 22 23:55:35 GMT 2011 armv7l GNU/Linux
sh-4.1#
ok that's odd, I guess debugfs isn't enabled, will rebuild it


its on in config.

needs mounting


mount -t debugfs none /sys/kernel/debug/
 

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1,014 Posts
Discussion Starter · #223 ·
Code:
 cat realtime_tegra_clock<br />
   clock                          state  ref div      rate<br />
--------------------------------------------------------------<br />
  *cdev2                          off    1            0         <br />
  *cdev1                          off    1            0         <br />
  *clk_m                          uninit 1            12000000  <br />
     *pcie_xclk                   off    1   1        12000000  <br />
     *afi                         off    1   1        12000000  <br />
     *pex                         off    1   1        12000000  <br />
     *csus                        off    1   1        12000000  <br />
     *isp                         off    1   1        12000000  <br />
     *usb3                        on     1   1        12000000  <br />
     *usb2                        off    1   1        12000000  <br />
     *usbd                        on     1   1        12000000  <br />
     *disp2                       off    1   1        12000000  <br />
     *tvdac                       off    1   1        12000000  <br />
     *hdmi                        off    1   1        12000000  <br />
     *tvo                         off    1   1        12000000  <br />
     *cve                         off    1   1        12000000  <br />
     *uarte                       off    1   1        12000000  <br />
     *uartd                       off    1   1        12000000  <br />
     *uartc                       off    1   1        12000000  <br />
     *uartb                       off    1   1        12000000  <br />
     *dvc                         off    1   4        3000000   <br />
     *i2c3                        off    1   1        12000000  <br />
     *i2c2                        off    1   4        3000000   <br />
     *i2c1                        off    1   15       800000    <br />
     *mipi                        off    1   1        12000000  <br />
     *nor                         off    1   1        12000000  <br />
     *owr                         off    1   1        12000000  <br />
     *la                          off    1   1        12000000  <br />
     *bsev                        off    1   1        12000000  <br />
     *bsea                        off    1   1        12000000  <br />
     *vcp                         off    1   1        12000000  <br />
     *sdmmc2                      off    1   1        12000000  <br />
     *vfir                        off    1   1        12000000  <br />
     *ide                         off    1   1        12000000  <br />
     *sbc4                        off    1   1        12000000  <br />
     *sbc3                        off    1   1        12000000  <br />
     *sbc2                        off    1   1        12000000  <br />
     *sbc1                        off    1   1        12000000  <br />
     *twc                         off    1   1        12000000  <br />
     *xio                         off    1   1        12000000  <br />
     *spi                         off    1   1        12000000  <br />
     *pwm                         on     1   128.5    93385     <br />
     *spdif_out                   off    1   1        12000000  <br />
     *i2s2                        off    1   1        12000000  <br />
     *i2s1                        off    1   1        12000000  <br />
     *kfuse                       off    1   1        12000000  <br />
     *timer                       on     1   1        12000000  <br />
     *clk_d                       off    1   x2       24000000  <br />
     *pll_e                       off    1   x100     1200000000<br />
     *pll_x                       on     1   x83.3..  1000000000<br />
        *cclk                     on     1            1000000000<br />
           *cpu                   uninit 1            1000000000<br />
     *pll_u                       on     1   x40      480000000 <br />
     *pll_d                       off    1   12       1000000   <br />
        *dsi                      off    1   1        1000000   <br />
        *pll_d_out0               off    1   2        500000    <br />
     *pll_p                       on     1   x18      216000000 <br />
        *disp1                    on     1   1        216000000 <br />
        *host1x                   off    1   2        108000000 <br />
        *uarta                    on     1   1        216000000 <br />
        *csite                    on     1   1.5      144000000 <br />
        *sdmmc4                   off    1   8.5      25411764  <br />
        *sdmmc3                   off    1   4.5      48000000  <br />
        *sdmmc1                   on     1   9        24000000  <br />
        *ndflash                  off    1   2        108000000 <br />
        *spdif_in                 off    1   6        36000000  <br />
        *pll_p_out4               on     1   9        24000000  <br />
        *pll_p_out3               on     1   3        72000000  <br />
           *csi                   off    1   1        72000000  <br />
           *dvc_i2c               on     1   1        72000000  <br />
           *i2c3_i2c              on     1   1        72000000  <br />
           *i2c2_i2c              on     1   1        72000000  <br />
           *i2c1_i2c              on     1   1        72000000  <br />
        *pll_p_out2               on     1   1        216000000 <br />
        *pll_p_out1               on     1   7.5      28800000  <br />
           *pll_a                 on     1   x1.9..   56448000  <br />
              *pll_a_out0         on     1   5        11289600  <br />
                 *audio           on     1            11289600  <br />
                    *audio_2x     off    1   x2       22579200  <br />
     *pll_c                       on     1   x50      600000000 <br />
        *vde                      off    1   2.5      240000000 <br />
        *pll_c_out1               on     1   2.5      240000000 <br />
           *sclk                  on     1            240000000 <br />
               avp.sclk           off    1            240000000 <br />
              *cop                uninit 1            240000000 <br />
              *hclk               on     1   1        240000000 <br />
                 *pclk            on     1   2        120000000 <br />
                    *apbdma       on     1   1        120000000 <br />
     *pll_m                       on     1   x55.5    666000000 <br />
        *mpe                      off    1   6        111000000 <br />
        *epp                      off    1   6        111000000 <br />
        *vi_sensor                off    1   6        111000000 <br />
        *vi                       off    1   6        111000000 <br />
        *2d                       off    1   6        111000000 <br />
        *3d                       off    1   6        111000000 <br />
        *emc                      on     1   1        666000000 <br />
            usb3.emc              off    1            666000000 <br />
            usb2.emc              off    1            666000000 <br />
            usb1.emc              off    1            666000000 <br />
            usbd.emc              off    1            666000000 <br />
            host.emc              off    1            666000000 <br />
            hdmi.emc              off    1            666000000 <br />
            disp2.emc             off    1            666000000 <br />
            disp1.emc             off    1            666000000 <br />
            cpu.emc               off    1            666000000 <br />
            avp.emc               off    1            666000000 <br />
        *pll_m_out1               on     1   3        222000000 <br />
   clk_32k                        on     1            32768     <br />
     *rtc                         on     1   1        32768     <br />
     *kbc                         off    1   1        32768     <br />
     *blink                       on     1   1        32768          *pll_s                       off    1   1        32768
 

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Discussion Starter · #224 ·
Code:
	{TEGRA_DRIVE_PINGROUP_AO1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_AO2,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_AT1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_AT2,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_CDEV1,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_CDEV2,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_CSUS,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_DAP1,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_DAP2,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_DAP3,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_DAP4,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_DBG,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_LCD1,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_LCD2,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_SDMMC2,  TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_SDMMC3,  TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_SPI,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_UAA,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_UAB,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_UART2,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_UART3,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_VI1,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_VI2,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_XM2A,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_28, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},<br />
	{TEGRA_DRIVE_PINGROUP_XM2C,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},<br />
	{TEGRA_DRIVE_PINGROUP_XM2D,    TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},<br />
	{TEGRA_DRIVE_PINGROUP_XM2CLK,  TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_28, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},<br />
	{TEGRA_DRIVE_PINGROUP_MEMCOMP, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_8, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},<br />
	{TEGRA_DRIVE_PINGROUP_SDIO1,   TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_CRT,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_DDC,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE,  TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_GMA,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_GMB,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_GMC,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_GMD,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_GME,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_OWR,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},<br />
	{TEGRA_DRIVE_PINGROUP_UAD,     TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
 

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1,014 Posts
Discussion Starter · #225 ·
Code:
 cat realtime_tegra_pinmux<br />
	{TEGRA_PINGROUP_ATA,   TEGRA_MUX_IDE,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_ATB,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_ATC,   TEGRA_MUX_NAND,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_ATD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_ATE,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_CDEV1, TEGRA_MUX_OSC,           TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_CDEV2, TEGRA_MUX_OSC,           TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_CRTP,  TEGRA_MUX_CRT,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_CSUS,  TEGRA_MUX_VI_SENSOR_CLK, TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DAP1,  TEGRA_MUX_DAP1,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DAP2,  TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DAP3,  TEGRA_MUX_DAP3,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DAP4,  TEGRA_MUX_DAP4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DDC,   TEGRA_MUX_RSVD2,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_DTA,   TEGRA_MUX_VI,            TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DTB,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DTC,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DTD,   TEGRA_MUX_VI,            TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DTE,   TEGRA_MUX_VI,            TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_DTF,   TEGRA_MUX_I2C3,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_GMA,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_GMB,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_GMC,   TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_GMD,   TEGRA_MUX_GMI,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_GME,   TEGRA_MUX_SDIO4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_GPU,   TEGRA_MUX_PWM,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_GPU7,  TEGRA_MUX_RTCK,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_GPV,   TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_HDINT, TEGRA_MUX_HDMI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_I2CP,  TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_IRRX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_IRTX,  TEGRA_MUX_UARTA,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_KBCA,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_KBCB,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_KBCC,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_KBCD,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_KBCE,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_KBCF,  TEGRA_MUX_KBC,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LCSN,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_LD0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD10,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD11,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD12,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD13,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD14,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD15,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD16,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD17,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD2,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD3,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD4,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD5,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD6,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD7,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD8,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LD9,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LDC,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LDI,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LHP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LHP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LHP2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LHS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LM0,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LM1,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_LPP,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LPW0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LPW1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_LPW2,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LSC0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LSC1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_LSCK,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_LSDA,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_LSDI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_LSPI,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LVP0,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_LVP1,  TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_LVS,   TEGRA_MUX_DISPLAYA,      TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_OWC,   TEGRA_MUX_OWR,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_PMC,   TEGRA_MUX_PWR_ON,        TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_PTA,   TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_RM,    TEGRA_MUX_I2C,           TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SDB,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SDC,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SDD,   TEGRA_MUX_SDIO3,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SDIO1, TEGRA_MUX_SDIO1,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SLXA,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_SLXC,  TEGRA_MUX_SPI4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SLXD,  TEGRA_MUX_SPI4,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SLXK,  TEGRA_MUX_PCIE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SPDI,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SPDO,  TEGRA_MUX_RSVD2,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SPIA,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_SPIB,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_SPIC,  TEGRA_MUX_GMI,           TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SPID,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SPIE,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SPIF,  TEGRA_MUX_SPI1,          TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SPIG,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_SPIH,  TEGRA_MUX_SPI2_ALT,      TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_UAA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_UAB,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_UAC,   TEGRA_MUX_RSVD4,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_UAD,   TEGRA_MUX_SPDIF,         TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_UCA,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_UCB,   TEGRA_MUX_UARTC,         TEGRA_PUPD_PULL_UP,   TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_UDA,   TEGRA_MUX_ULPI,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_TRISTATE},<br />
	{TEGRA_PINGROUP_CK32,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_DDRC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_PMCA,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_PMCB,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_PMCC,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_PMCD,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_PMCE,  TEGRA_MUX_NONE,          TEGRA_PUPD_PULL_UP,   TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_XM2C,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},<br />
	{TEGRA_PINGROUP_XM2D,  TEGRA_MUX_NONE,          TEGRA_PUPD_NORMAL,    TEGRA_TRI_NORMAL},
 

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1,014 Posts
Discussion Starter · #226 ·
Code:
cat gpio<br />
GPIOs 0-223, tegra-gpio:<br />
 gpio-23  (nvrm_gpio           ) out hi<br />
 gpio-24  (card_poweron        ) out hi<br />
 gpio-28  (gpio_keys           ) in  hi irq-220 edge-both<br />
 gpio-57  (nvrm_gpio           ) out hi<br />
 gpio-58  (nvrm_gpio           ) in  hi irq-250 (default)<br />
 gpio-69  (card_detect         ) in  lo irq-261 edge-both<br />
 gpio-72  (accel_intr          ) in  hi<br />
 gpio-79  (nvrm_gpio           ) in  hi irq-271 (default)<br />
 gpio-82  (nvrm_gpio           ) out hi<br />
 gpio-85  (nvrm_gpio           ) out hi<br />
 gpio-86  (nvrm_gpio           ) out hi<br />
 gpio-87  (nvrm_gpio           ) out lo<br />
 gpio-110 (nvrm_gpio           ) in  hi<br />
 gpio-160 (lbee9qmb_reset      ) out hi<br />
 gpio-170 (nvrm_gpio           ) in  hi irq-362 (default) wakeup<br />
 gpio-172 (gpio_keys           ) in  hi irq-364 edge-both<br />
 gpio-174 (nvrm_gpio           ) in  hi irq-366 (default)<br />
 gpio-178 (nvrm_gpio           ) in  hi irq-370 (default)
 

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1,014 Posts
Discussion Starter · #227 ·
Code:
cat realtime_tegra_emc<br />
	0x00000014, /*RC*/<br />
	0x0000002b, /*RFC*/<br />
	0x0000000f, /*RAS*/<br />
	0x00000005, /*RP*/<br />
	0x00000004, /*R2W*/<br />
	0x00000005, /*W2R*/<br />
	0x00000003, /*R2P*/<br />
	0x0000000c, /*W2P*/<br />
	0x00000005, /*RD_RCD*/<br />
	0x00000005, /*WR_RCD*/<br />
	0x00000003, /*RRD*/<br />
	0x00000001, /*REXT*/<br />
	0x00000004, /*WDV*/<br />
	0x00000005, /*QUSE*/<br />
	0x00000004, /*QRST*/<br />
	0x00000009, /*QSAFE*/<br />
	0x0000000d, /*RDV*/<br />
	0x000009ff, /*REFRESH*/<br />
	0x00000000, /*BURST_REFRESH_NUM*/<br />
	0x00000003, /*PDEX2WR*/<br />
	0x00000003, /*PDEX2RD*/<br />
	0x00000005, /*PCHG2PDEN*/<br />
	0x00000005, /*ACT2PDEN*/<br />
	0x00000001, /*AR2PDEN*/<br />
	0x0000000f, /*RW2PDEN*/<br />
	0x000000c8, /*TXSR*/<br />
	0x00000003, /*TCKE*/<br />
	0x0000000c, /*TFAW*/<br />
	0x00000006, /*TRPAB*/<br />
	0x00000008, /*TCLKSTABLE*/<br />
	0x00000002, /*TCLKSTOP*/<br />
	0x00000000, /*TREFBW*/<br />
	0x00000000, /*QUSE_EXTRA*/<br />
	0x00000002, /*FBIO_CFG6*/<br />
	0x00000000, /*ODT_WRITE*/<br />
	0x00000000, /*ODT_READ*/<br />
	0x00000083, /*FBIO_CFG5*/<br />
	0x2043048b, /*CFG_DIG_DLL*/<br />
	0x007fb010, /*DLL_XFORM_DQS*/<br />
	0x00014014, /*DLL_XFORM_QUSE*/<br />
	0x00000000, /*ZCAL_REF_CNT*/<br />
	0x00000000, /*ZCAL_WAIT_CNT*/<br />
	0x00000000, /*AUTO_CAL_INTERVAL*/<br />
	0x00000000, /*CFG_CLKTRIM_0*/<br />
	0x00000000, /*CFG_CLKTRIM_1*/<br />
	0x00000000, /*CFG_CLKTRIM_2*/
 

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Okay that does the trick.

If you plan to realease kernelregulary please do not touch the vold.fstab as yours is brocken.


hope that helps. good night...

##########################cut & paste #####################################

sh-4.1# insmod /system/lib/modules/tegra-config-peek.ko
sh-4.1# mount -t debugfs none /sys/kernel/debug/
sh-4.1# cd /sys/kernel/debug/
sh-4.1#
sh-4.1# cat realtime_tegra_clock
clock state ref div rate
--------------------------------------------------------------
*cdev2 off 1 0
*cdev1 off 1 0
*clk_m uninit 1 12000000
*pcie_xclk off 1 1 12000000
*afi off 1 1 12000000
*pex off 1 1 12000000
*csus off 1 1 12000000
*isp off 1 1 12000000
*usb3 on 1 1 12000000
*usb2 off 1 1 12000000
*usbd on 1 1 12000000
*tvdac off 1 1 12000000
*tvo off 1 1 12000000
*cve off 1 1 12000000
*uarte off 1 1 12000000
*uartd off 1 1 12000000
*uartc off 1 1 12000000
*uartb off 1 1 12000000
*dvc off 1 4 3000000
*i2c3 off 1 1 12000000
*i2c2 off 1 4 3000000
*i2c1 off 1 15 800000
*mipi off 1 1 12000000
*nor off 1 1 12000000
*owr off 1 1 12000000
*la off 1 1 12000000
*bsev off 1 1 12000000
*bsea off 1 1 12000000
*vcp off 1 1 12000000
*sdmmc2 off 1 1 12000000
*vfir off 1 1 12000000
*ide off 1 1 12000000
*sbc4 off 1 1 12000000
*sbc3 off 1 1 12000000
*sbc2 off 1 1 12000000
*sbc1 off 1 1 12000000
*twc off 1 1 12000000
*xio off 1 1 12000000
*spi off 1 1 12000000
*pwm on 1 128.5 93385
*i2s2 off 1 1 12000000
*kfuse off 1 1 12000000
*timer on 1 1 12000000
*clk_d off 1 x2 24000000
*pll_e off 1 x100 1200000000
*pll_x on 1 x83.3.. 1000000000
*cclk on 1 1000000000
*cpu uninit 1 1000000000
*pll_u on 1 x40 480000000
*pll_d on 1 x49.5 594000000
*dsi off 1 1 594000000
*pll_d_out0 off 1 2 297000000
*disp2 on 1 1 297000000
*hdmi on 1 4 74250000
*pll_p on 1 x18 216000000
*host1x on 1 2 108000000
*uarta on 1 1 216000000
*csite on 1 1.5 144000000
*sdmmc4 on 1 8.5 25411764
*sdmmc3 off 1 4.5 48000000
*sdmmc1 on 1 9 24000000
*ndflash off 1 2 108000000
*spdif_in on 1 6 36000000
*pll_p_out4 on 1 9 24000000
*pll_p_out3 on 1 3 72000000
*csi off 1 1 72000000
*dvc_i2c on 1 1 72000000
*i2c3_i2c on 1 1 72000000
*i2c2_i2c on 1 1 72000000
*i2c1_i2c on 1 1 72000000
*pll_p_out2 on 1 2 108000000
*sclk on 1 108000000
avp.sclk off 1 108000000
*cop uninit 1 108000000
*hclk on 1 1 108000000
*pclk on 1 2 54000000
*apbdma on 1 1 54000000
*pll_p_out1 on 1 7.5 28800000
*pll_a on 1 x1.9.. 56448000
*pll_a_out0 on 1 5 11289600
*audio on 1 11289600
*audio_2x off 1 x2 22579200
*spdif_out on 1 2 5644800
*i2s1 off 1 4 2822400
*pll_c on 1 x50 600000000
*disp1 on 1 1 600000000
*epp on 1 2 300000000
*2d on 1 2 300000000
*vde off 1 2.5 240000000
*pll_c_out1 on 1 2.5 240000000
*pll_m on 1 x55.5 666000000
*mpe off 1 6 111000000
*vi_sensor off 1 6 111000000
*vi off 1 6 111000000
*3d on 1 2 333000000
*emc on 1 1 666000000
usb3.emc off 1 666000000
usb2.emc off 1 666000000
usb1.emc off 1 666000000
usbd.emc off 1 666000000
host.emc off 1 666000000
hdmi.emc off 1 666000000
disp2.emc off 1 666000000
disp1.emc off 1 666000000
cpu.emc off 1 666000000
avp.emc off 1 666000000
*pll_m_out1 on 1 3 222000000
clk_32k on 1 32768
*rtc on 1 1 32768
*kbc off 1 1 32768
*blink on 1 1 32768
*pll_s off 1 1 32768
sh-4.1#
sh-4.1# cat realtime_tegra_pinmux_drive
{TEGRA_DRIVE_PINGROUP_AO1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AO2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AT1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AT2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_CDEV1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_CDEV2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_CSUS, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP3, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP4, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DBG, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_LCD1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_LCD2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_SDMMC2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_SDMMC3, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_SPI, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UAA, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UAB, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UART2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UART3, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_VI1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_VI2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_XM2A, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_28, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
{TEGRA_DRIVE_PINGROUP_XM2C, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
{TEGRA_DRIVE_PINGROUP_XM2D, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
{TEGRA_DRIVE_PINGROUP_XM2CLK, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_28, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
{TEGRA_DRIVE_PINGROUP_MEMCOMP, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
{TEGRA_DRIVE_PINGROUP_SDIO1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_CRT, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DDC, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GMA, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GMB, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GMC, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GMD, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GME, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_OWR, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UAD, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
sh-4.1#
sh-4.1# cd /sys/kernel/debug/
sh-4.1#
sh-4.1# cat realtime_tegra_clock
clock state ref div rate
--------------------------------------------------------------
*cdev2 off 1 0
*cdev1 off 1 0
*clk_m uninit 1 12000000
*pcie_xclk off 1 1 12000000
*afi off 1 1 12000000
*pex off 1 1 12000000
*csus off 1 1 12000000
*isp off 1 1 12000000
*usb3 on 1 1 12000000
*usb2 off 1 1 12000000
*usbd on 1 1 12000000
*tvdac off 1 1 12000000
*tvo off 1 1 12000000
*cve off 1 1 12000000
*uarte off 1 1 12000000
*uartd off 1 1 12000000
*uartc off 1 1 12000000
*uartb off 1 1 12000000
*dvc off 1 4 3000000
*i2c3 off 1 1 12000000
*i2c2 off 1 4 3000000
*i2c1 off 1 15 800000
*mipi off 1 1 12000000
*nor off 1 1 12000000
*owr off 1 1 12000000
*la off 1 1 12000000
*bsev off 1 1 12000000
*bsea off 1 1 12000000
*vcp off 1 1 12000000
*sdmmc2 off 1 1 12000000
*vfir off 1 1 12000000
*ide off 1 1 12000000
*sbc4 off 1 1 12000000
*sbc3 off 1 1 12000000
*sbc2 off 1 1 12000000
*sbc1 off 1 1 12000000
*twc off 1 1 12000000
*xio off 1 1 12000000
*spi off 1 1 12000000
*pwm on 1 128.5 93385
*i2s2 off 1 1 12000000
*kfuse off 1 1 12000000
*timer on 1 1 12000000
*clk_d off 1 x2 24000000
*pll_e off 1 x100 1200000000
*pll_x on 1 x32.4.. 389000000
*cclk on 1 389000000
*cpu uninit 1 389000000
*pll_u on 1 x40 480000000
*pll_d on 1 x49.5 594000000
*dsi off 1 1 594000000
*pll_d_out0 off 1 2 297000000
*disp2 on 1 1 297000000
*hdmi on 1 4 74250000
*pll_p on 1 x18 216000000
*host1x on 1 2 108000000
*uarta on 1 1 216000000
*csite on 1 1.5 144000000
*sdmmc4 off 1 8.5 25411764
*sdmmc3 off 1 4.5 48000000
*sdmmc1 on 1 9 24000000
*ndflash off 1 2 108000000
*spdif_in on 1 6 36000000
*pll_p_out4 on 1 9 24000000
*pll_p_out3 on 1 3 72000000
*csi off 1 1 72000000
*dvc_i2c on 1 1 72000000
*i2c3_i2c on 1 1 72000000
*i2c2_i2c on 1 1 72000000
*i2c1_i2c on 1 1 72000000
*pll_p_out2 on 1 2 108000000
*sclk on 1 108000000
avp.sclk off 1 108000000
*cop uninit 1 108000000
*hclk on 1 1 108000000
*pclk on 1 2 54000000
*apbdma on 1 1 54000000
*pll_p_out1 on 1 7.5 28800000
*pll_a on 1 x1.9.. 56448000
*pll_a_out0 on 1 5 11289600
*audio on 1 11289600
*audio_2x off 1 x2 22579200
*spdif_out on 1 2 5644800
*i2s1 off 1 4 2822400
*pll_c on 1 x50 600000000
*disp1 on 1 1 600000000
*epp on 1 2 300000000
*2d on 1 2 300000000
*vde off 1 2.5 240000000
*pll_c_out1 on 1 2.5 240000000
*pll_m on 1 x55.5 666000000
*mpe off 1 6 111000000
*vi_sensor off 1 6 111000000
*vi off 1 6 111000000
*3d on 1 2 333000000
*emc on 1 1 666000000
usb3.emc off 1 666000000
usb2.emc off 1 666000000
usb1.emc off 1 666000000
usbd.emc off 1 666000000
host.emc off 1 666000000
hdmi.emc off 1 666000000
disp2.emc off 1 666000000
disp1.emc off 1 666000000
cpu.emc off 1 666000000
avp.emc off 1 666000000
*pll_m_out1 on 1 3 222000000
clk_32k on 1 32768
*rtc on 1 1 32768
*kbc off 1 1 32768
*blink on 1 1 32768
*pll_s off 1 1 32768
sh-4.1#
sh-4.1# cat realtime_tegra_pinmux_drive
{TEGRA_DRIVE_PINGROUP_AO1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AO2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AT1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_AT2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_CDEV1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_CDEV2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_CSUS, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP3, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DAP4, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DBG, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_LCD1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_LCD2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_SDMMC2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_SDMMC3, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_SPI, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UAA, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UAB, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UART2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UART3, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_VI1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_VI2, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_XM2A, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_28, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
{TEGRA_DRIVE_PINGROUP_XM2C, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
{TEGRA_DRIVE_PINGROUP_XM2D, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
{TEGRA_DRIVE_PINGROUP_XM2CLK, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_28, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_FAST},
{TEGRA_DRIVE_PINGROUP_MEMCOMP, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_8, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_FASTEST, TEGRA_SLEW_FASTEST},
{TEGRA_DRIVE_PINGROUP_SDIO1, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_CRT, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_DDC, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_ENABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_31, TEGRA_PULL_31, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GMA, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GMB, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GMC, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GMD, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_GME, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_OWR, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
{TEGRA_DRIVE_PINGROUP_UAD, TEGRA_HSM_DISABLE, TEGRA_SCHMITT_DISABLE, TEGRA_DRIVE_DIV_1, TEGRA_PULL_18, TEGRA_PULL_22, TEGRA_SLEW_SLOWEST, TEGRA_SLEW_SLOWEST},
sh-4.1#
 
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